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Verification Team Lead, Graviton Team

Amazon· Hardware Development
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Haifa, Israel, Tel Aviv, IsraelUnknownPosted 1mo ago

About the role

Senior Design Verification Technical Lead responsible for verification of complex SoC sub-systems for the Graviton server SoC, engaging from product definition through silicon, and collaborating across hardware, software, and physical design.

Responsibilities

  • Develop and execute verification plans for IO sub-systems- covering interconnect protocols, peripheral interfaces, and system-level integration
  • Verify IO sub-system features including interconnect protocols, various accelerators engines
  • C embedded SW programming and SW debug skills
  • Build and maintain UVM-based verification environments for IO sub-systems
  • Verify ARM advanced interconnect protocols (AMBA CHI/ACE/AXI) ensuring correct coherency transactions, performance verification, and protocol compliance
  • Verify the IO virtualization SMMU/TLB operations, page table walks, translation granules, and memory attributes (cache-ability, share-ability)
  • Develop constrained-random and directed test strategies targeting corner cases in IO protocol hazards, coherency races, and system boundary conditions
  • Drive coverage closure using functional coverage models, assertion-based verification, and formal methods where applicable
  • Contribute to performance verification — ensuring micro-architectural implementations meet performance targets alongside correctness

Qualifications

  • Electrical/Computer Science engineer
  • 8+ years of experience with full-chip/system-level verification of a large-scale SoC
  • Experience with Test Writing and SW development (C/C++/Assembly)
  • Hands-on verification/validation experience, including: debugging emulation and/or silicon platforms, waveform debugging, coverage definition and analysis, etc.

Skills

Required:Electrical/Computer Science engineeringFull-chip/system-level verificationC embedded software developmentUVM-based verificationARM AMBA interconnect protocolsSMMU/TLB, page tables, memory attributesConstrained-random testing
Nice to have:Functional coverage and formal methodsPerformance verification
Last updated Oct 25, 2026. Interested? Apply on the company site.

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