ASIC Design Engineer II
Amazon· Annapurna Labs (U.S.) Inc.
Austin, TX$153.6k - $215kFull-timePosted 1mo ago
About the role
ASIC Design Engineer II responsible for design and optimization of high-performance, power-efficient RTL designs for AWS Cloud-Scale ML acceleration hardware (e.g., AWS Inferentia), collaborating with cross-functional teams to meet hardware targets at data center scale.
Responsibilities
- Develop and implement high-performance, area and power-efficient RTL designs to meet project specifications and targets
- Conduct in-depth analysis of designs, microarchitectures, and architectures to optimize trade-offs between features, power consumption, performance, and area requirements
- Create microarchitectures, implement SystemVerilog RTL, and deliver synthesis and timing-clean designs with appropriate constraints
- Execute lint and clock domain crossing quality checks to ensure design integrity
- Collaborate closely with cross-functional teams, including architects, fellow designers, verification specialists, pre- and post-silicon validation teams, and synthesis, timing, and back-end experts
Qualifications
- Bachelor's degree or equivalent
- 3+ years of non-internship design or architecture (design patterns, reliability and scaling) of new and existing systems experience
Skills
Required:SystemVerilogRTL designSynthesis and timing constraints
Benefits
- Health insurance (medical, dental, vision, prescription) and life insurance
- 401(k) matching
- Paid time off
- Parental leave
- RSUs and sign-on payments included in compensation
Last updated Oct 25, 2026. Interested? Apply on the company site.
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