Senior Verification Engineer, PCIE
NVIDIA· Engineer, Verification
BengaluruNot specifiedPosted 1mo ago
About the role
Senior verification engineer to verify PCI Express controller design and implementation for GPUs and SOCs using state-of-the-art verification methodologies, collaborating with cross-functional teams.
Responsibilities
- Be responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using state-of-the-art verification methodologies such as UVM.
- Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology.
- Expected to understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design.
- You will be collaborating with architects, designers, and pre and post silicon verification teams to accomplish your tasks.
Qualifications
- B.Tech./ M.Tech or equivalent experience
- 4+ years of relevant experience
- Experience in verification at Unit/Sub-system/SOC level and expertise in Verilog and SystemVerilog
- Expertise in comprehensive verification of IP or interconnect protocols (e.g. PCI Express, USB, SATA)
- Experience in developing and working in functional coverage based constrained random verification environments
- Background in DV methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug
Skills
Required:VerilogSystemVerilogUVM/VMMFunctional coverage based constrained random verificationPCI Express/Interconnect protocolsUVM
Nice to have:Scripting (Python/Perl)
Benefits
- With competitive salaries and a generous benefits package
Last updated Sep 11, 2026. Interested? Apply on the company site.
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