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Formal Verification Engineer

NVIDIA· Engineer, Verification
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Bengaluru, GurugramFull-timePosted 1mo ago

About the role

Experienced Formal Verification Engineer to craft and optimize formal verification flows for CPU/GPU projects, verify micro-architecture using formal techniques, and resolve tool issues for design teams within NVIDIA's Central Formal team in Bangalore.

Responsibilities

  • The specification, implementation, and maintenance of an integrated end-to-end formal verification flow for the formal verification team.
  • Developing scripts to automate the verification process.
  • Review formal setups and proofs with design and verification teams.
  • Maintain and extend assertion libraries, including support for both simulation and FV.
  • Identifying key behaviours for verification of DUT and creating a verification plan.
  • Developing verification environment including environment assumptions, assertions and cover properties in context of the verification plan.
  • Applying various FV techniques to prove correctness of digital designs.
  • Debugging RTL to identify causes of failure scenarios.

Qualifications

  • Bachelors/Masters in Electronics & Communications or Computer Science or electrical engineering from a reputed engineering college.
  • Minimum 2+ years of industry experience on formal techniques for verification.
  • Strong analytical skills to tackle hard problems.
  • Excellent command of scripting.
  • Strong knowledge of architectures of CPU designs and digital logic.
  • Good understanding of abstraction techniques for effective verification.
  • Hands-on experience with HDLs such as Verilog / System Verilog.
  • Understanding of temporal logic assertions.
  • Preferable experience with a variety of Formal Verification Tools.
  • Strong communication skills and ability to collaborate across sites.

Skills

Required:Formal verification techniquesScriptingVerilog / System VerilogTemporal logic
Last updated Sep 11, 2026. Interested? Apply on the company site.

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