Principal EDA R&D Engineer
NVIDIA· Engineer, Verification
Santa Clara, CA, Austin, TX, Westford, MA, Hillsboro, OR, Hybrid (Remote)$232k - $368kFull-timePosted 1mo ago
About the role
Experienced Principal EDA R&D Engineer to pioneer next-generation Hardware Formal Verification tools, lead research and development of core formal verification engines enhanced by Agentic AI frameworks, and architect multi-agent AI systems to optimize large-scale EDA designs.
Responsibilities
- Architect, construct, and advance brand new formal verification algorithms (e.g., Model Checking, SAT/SMT solvers, BDDs, Equivalence Checking, and Theorem Proving).
- Design, develop, and deploy multi-agent AI systems (using LLMs, Reinforcement Learning, and Graph Neural Networks) that autonomously analyze RTL topologies, partition large design spaces, and dynamically tune solver parameters.
- Develop intelligent orchestration layers where autonomous AI agents collaborate to bypass state-space explosion, handling multi-billion-gate builds and deep sequential depth.
- Develop intelligent engines capable of handling ingestion, abstraction, and the automatic generation of complex System Verilog Assertions (SVA) from natural language specifications and architectural intent.
- Drive features from initial algorithmic research through implementation in high-performance C/C++ environments, ensuring seamless integration into commercial EDA tool suites.
Qualifications
- Ph.D. or Master’s degree or equivalent experience in Computer Science, Electrical Engineering, Computer Engineering, or a related quantitative field.
- Minimum of 15 years of professional R&D experience specifically building commercial or advanced academic Electronic Design Automation (EDA) hardware verification tools.
- Deep mathematical and hands-on understanding of formal methods, including bounded model checking (BMC), unbounded model checking (PDR/IC3), abstract interpretation, and theorem proving.
- Expert-level proficiency in C/C++ (Modern C++17/20) with focus on high-performance data structures, memory optimization, and multi-threading.
- Proven experience building or researching Agentic AI pipelines, multi-agent frameworks (e.g., LangChain, AutoGen, CrewAI), tool-use execution, and prompt-engineering tailored to structured code or hardware descriptions.
- Experience with RTL languages (System Verilog, VHDL, Verilog) combined with solid understanding of System Verilog Assertions (SVA).
Skills
Required:Formal methodsC/C++Agentic AI pipelinesRTL/SystemVerilogMulti-agent frameworks
Benefits
- equity
- benefits (per company policy)
Last updated Sep 11, 2026. Interested? Apply on the company site.
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