RTL Design Engineer, TPU Compute
Hybrid (Sunnyvale, CA; Austin, TX)$138k - $197kFull-timePosted 1mo ago
About the role
Role focused on shaping AI/ML hardware acceleration by driving TPU compute technology, designing and verifying digital RTL implementations for TPU architecture, and collaborating with cross-functional teams.
Responsibilities
- Work on their own to create and review Compute subsystem's design microarchitecture specifications.
- Develop SystemVerilog RTL to implement logic for ASIC products according to established coding and quality guidelines.
- Work with design validation (DV) teams to create testplans to verify, and debug design RTL.
- Work with physical design teams to ensure design meets physical requirements and timing closure.
Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 4 years of experience with digital design experience using SystemVerilog RTL.
- Experience with Computer Architecture.
Skills
Required:SystemVerilog RTLComputer Architecture
Benefits
- Learn more about benefits at Google (provided link in description)
Last updated Oct 23, 2026. Interested? Apply on the company site.
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