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Senior ASIC Cloud Design Verification Engineer

Google· AI and Infrastructure
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Sunnyvale, CA, USA$163k - $236kFull-timePosted 1mo ago

About the role

Role focused on shaping the future of AI/ML hardware acceleration by driving TPU technology, verifying complex digital designs for data-center accelerators, and contributing to the verification life cycle and silicon bring-up.

Responsibilities

  • Plan the verification of complex digital design blocks by understanding the design specification and collaborating with design engineers to identify important verification scenarios
  • Create and enhance constrained-random verification environments using SystemVerilog and UVM
  • Identify and write all types of coverage measures for stimulus and corner-cases
  • Debug tests with design engineers to deliver functionally correct design blocks
  • Close coverage measures to identify verification holes and to show progress towards tape-out

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent practical experience
  • 8 years of experience with design verification
  • Experience in verifying digital logic at RTL using SystemVerilog/UVM for ASICs
  • Preferred: Master's degree or PhD in Electrical/Computer Engineering or Computer Science with emphasis on computer architecture
  • Preferred: 10 years of experience with industry standard tools, languages and methodologies for silicon-based ICs
  • Preferred: experience with the full verification life cycle
  • Preferred: experience with three or more SoC projects/cycles and verifying interconnect IPs

Skills

Required:SystemVerilog/UVMDigital design verificationConstrained-random verification

Benefits

  • Learn more about benefits at Google (see job posting)
Last updated Oct 23, 2026. Interested? Apply on the company site.

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