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Physical Design Engineer (RDSS Intern)

NVIDIA· Intern
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Taiwan, HsinchuinternPosted 1mo ago

About the role

RDSS Intern position in Taiwan (Hsinchu) focusing on physical design of NVIDIA chips, including floorplanning, placement, routing, timing/power/noise optimization, verification, and flow automation.

Responsibilities

  • Responsible for all aspects of physical design (Netlist to GDSII & Flow development) of all chips at NVIDIA. (including GeForce/Tegra/Tesla/Quadro)
  • Work on floorplan(from top level to block level)
  • Power/clock distribution
  • Placement, routing (from top level to block level)
  • Timing/power/noise/DFM optimization and analysis
  • Chip assembly, and physical verification
  • Flow automation, regression testing
  • Work with EDA vendors on tool evaluation and improvement
  • Develop inhouse tools and solutions

Qualifications

  • MS in Microelectronics, EE, CS, or related major
  • Courses taken in IC design or digital circuit design
  • Knowledge of chip design, Place&Route

Skills

Required:IC designPlace&Route
Nice to have:EDA toolsPerl/Python/Tcl/Shell scripting
Last updated Sep 18, 2026. Interested? Apply on the company site.

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