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Chip Power Estimation Engineer

NVIDIA· Engineer, ASIC
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Full-timePosted 1mo ago

About the role

Engineer to develop architectural power estimation models and tools for NVIDIA GPUs and SOCs, correlate with silicon data, and optimize power/performance across use-cases.

Responsibilities

  • Architecture, development and correlation of power estimation models/tools for NVIDIA's chips
  • Help architect and develop power models for use-cases, Idle power and IO power
  • Chip in to design the tools based on these models and their testing methodology/infrastructures
  • Correlate and Calibrate the power models using measured silicon data
  • Analyze and help decide the chip configuration and process technology options to optimize power/performance for NVIDIA's upcoming chips
  • Help study and contribute to Performance/Watt improvement ideas for NVIDIA's GPUs and SOCs

Qualifications

  • B.Tech./M.Tech and 2+ years of experience related to Power / Performance estimation and optimization techniques
  • Strong fundamentals in power including transistor-level leakage/dynamic characteristics of VLSI circuits
  • Familiarity with low power design techniques such as multi VT, Clock gating, Power gating, and Dynamic Voltage-Frequency Scaling (DVFS)
  • Strong background in power estimation techniques, flows and algorithms
  • Good programming skills - Python preferred. Good skills with object-oriented programming and design.

Skills

Required:Power/Performance estimation

Benefits

  • Competitive salaries and a generous benefits package
  • Equal opportunity employer with value of diversity
Last updated Sep 18, 2026. Interested? Apply on the company site.

About NVIDIA

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NVIDIA invents the GPU and drives advances in AI, HPC, gaming, creative design, autonomous vehicles, and robotics.

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