ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team
Amazon· Annapurna Labs (U.S.) Inc.
Hybrid (Cupertino, CA or Austin, TX)$176.6k - $247.3kFull-timePosted 1mo ago
About the role
ASIC Design Engineer responsible for design and optimization of high-performance, power-efficient RTL for AWS Cloud-Scale ML acceleration hardware (e.g., Inferentia) and collaboration with cross-functional teams to deliver silicon from IP blocks to full SoCs.
Responsibilities
- Develop and implement high-performance, area and power-efficient RTL designs to meet project specifications and targets
- Conduct in-depth analysis of designs, microarchitectures, and architectures to optimize trade-offs between features, power consumption, performance, and area requirements
- Create microarchitectures, implement SystemVerilog RTL, and deliver synthesis and timing-clean designs with appropriate constraints
- Execute lint and clock domain crossing quality checks to ensure design integrity
- Collaborate closely with cross-functional teams, including architects, fellow designers, verification specialists, pre- and post-silicon validation teams, and synthesis, timing, and back-end experts
Qualifications
- Bachelor's degree in Electrical Engineering or a related field
- Experience identifying bugs in architecture, algorithms, functionality, and performance with strong overall debugging skills
- Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing
Skills
Required:RTL designSystemVerilogDesign verification
Benefits
- Base salary with sign-on payments and RSUs
- Comprehensive benefits including health insurance (medical, dental, vision, prescription) and other life, disability, and voluntary plans
- 401(k) matching, paid time off, parental leave
Last updated Oct 25, 2026. Interested? Apply on the company site.
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