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Senior ASIC Design Verification Engineer - LPU

NVIDIA· Engineer, Verification
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Santa Clara, CA, Austin, TX, Westford, MA, Durham, NC, Boulder, CO, Seattle, WA$168k - $264.5kfull-timePosted 4w ago

About the role

NVIDIA seeks experienced ASIC Verification Engineers to verify the design and implementation of an inference accelerator, contributing to high-performance processor elements for programmable compute and graphics functionalities in AI, GPU, and autonomous systems.

Responsibilities

  • As a key member of our ASIC Verification team, you will verify the design and implementation of inference accelerator
  • You will be responsible for verification of the ASIC design, architecture, reference models and micro-architecture using advanced verification methodologies
  • Understand the design and implementation of your unit, define the verification scope, develop the verification infrastructure and verify the correctness of the design
  • Collaborate with architects, designers, and pre and post silicon verification teams to accomplish your tasks
  • Implement and optimize automated verification flows to improve productivity and efficiency
  • Stay updated on the latest trends and advancements in ASIC design verification and incorporate innovative techniques into the verification process

Qualifications

  • Bachelors Degree in EE, CS or CE (or equivalent experience) and 8+ years of relevant industry experience
  • Background with building block and SoC level testbench utilizing strong debugging and analytical skills
  • Experience in verification using random stimulus along with functional coverage, assertion-based verification methodologies and tools
  • Expertise in SystemVerilog and Universal Verification Methodology (UVM)
  • Experience with design and verification tools (VCS, Verdi or equivalent)
  • Background in UPF power verification is a plus
  • Experience in netlist and DFT verification is a plus
  • Perl/Python and C/C++ programming language experience desirable
  • Knowledge of ASIC design flow, from specification to GDS
  • Knowledge of applying machine learning to ASIC verification flow

Skills

Required:SystemVerilogUVM (Universal Verification Methodology)Verification methodologiesVCS/Verdi or equivalentASIC design flowMachine learning in verification
Nice to have:UPF power verificationNetlist/DFT verificationProgramming languages

Benefits

  • equity
  • benefits package as described by NVIDIA (link provided in description)
Last updated Sep 25, 2026. Interested? Apply on the company site.

About NVIDIA

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