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Senior Chip Design Engineer

NVIDIA· Engineer, ASIC
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Beersheba, Israelfull-timePosted 4w ago

About the role

Senior Chip Design Engineer for the Network Adapter Silicon group at NVIDIA. Responsible for RTL design and verification of Networking silicon blocks, driving implementation flow from micro-architecture to physical design, and collaborating with architecture, verification, FW, and post-silicon teams.

Responsibilities

  • Own micro-architecture definition and RTL implementation of chip blocks/entities according to specifications, performance, timing, area and power requirements.
  • Drive design through the full implementation flow — synthesis, timing closure, lint/CDC and physical design constraints — together with backend teams.
  • Work in a combined design and verification team which develops core units within the Networking silicon.
  • Work closely with multiple teams within organizations such as Architecture, Micro-Architecture, Verification, FW and Post-Silicon validation.

Qualifications

  • B.Sc. in Electrical Engineering or Computer Engineering, or equivalent experience.
  • 5+ years of proven experience in RTL design.
  • Strong knowledge of HDL (Verilog/SystemVerilog/VHDL).
  • Solid understanding of digital design fundamentals — pipelining, clock domain crossing, arbitration and low-power techniques.
  • Familiarity with synthesis and static timing analysis is an advantage.
  • A great teammate with good communication and interpersonal skills.

Skills

Required:RTL designHDLdigital design fundamentals
Nice to have:synthesis and static timing analysis
Last updated Sep 25, 2026. Interested? Apply on the company site.

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