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RTL Design Engineer, TPU

Google· AI and Infrastructure
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Sunnyvale, CA, USA$163k - $236kFull-timePosted 4w ago

About the role

Position focused on RTL design for TPU data-center accelerators, shaping AI/ML hardware acceleration and collaborating across software, system hardware, and cross-functional teams to develop verification-ready RTL IP for TPU architecture and integration within AI/ML systems.

Responsibilities

  • Work separately to create and review management and control subsystem's design microarchitecture specifications.
  • Develop SystemVerilog RTL to implement logic for ASIC products according to established coding and quality guidelines.
  • Work with architecture and power teams to evaluate features and their impact.
  • Work with design validation (DV) teams to create test plans to verify, and debug design RTL.
  • Work with physical design teams to ensure design meets physical requirements and timing closure.

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • Experience with scripting languages.

Skills

Required:SystemVerilog RTLRTL designChip/SoC integrationCross-functional collaboration
Last updated Oct 23, 2026. Interested? Apply on the company site.

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