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Staff SWE, ML Compiler Performance Engineer Co-Design

Google· Google Mountain View Team
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Mountain View, CA, USA$207k - $300kFull-timePosted 4w ago

About the role

Software engineering role focused on ML compiler performance co-design for TPU-related workloads within the MARC team, shaping open-source model mappings and TPU performance strategies ahead of silicon. Involves cross-functional collaboration with TPU Hardware, XLA Compiler, and Cloud AI Systems to drive multi-year roadmaps.

Responsibilities

  • Deliver certified performance benchmarks six months pre-pilot as primary targets for pricing, capacity planning, and kernel optimization.
  • Adapt emerging open-source models into TPU-native paired variants, including sparsity optimization, to demonstrate differentiated TPU performance.
  • Ingest and optimize multi-turn agentic workflows, reasoning loops, and prompt and decode topologies prior to silicon tape-out.
  • Author robust reference implementations using PyTorch, JAX, or Pallas that meet pre-pilot goals under compiler constraints.
  • Partner with director and executive technical leadership across TPU Hardware, XLA Compiler, and Cloud AI Systems to steer multi-year roadmaps.

Qualifications

  • Bachelor's degree or equivalent practical experience.
  • 8 years of experience programming in C++ or Python.
  • 5 years of experience testing, and launching software products.
  • 5 years of experience with performance, large-scale systems data analysis, visualization tools, or debugging.
  • 3 years of experience with software design and architecture.

Skills

Required:C++PythonOpen-source ML models
Nice to have:MLIR / XLA / HLOPyTorch / PyTorch/XLA
Last updated Oct 23, 2026. Interested? Apply on the company site.

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