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Power and Signal Integrity Engineer

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Hybrid (Haifa or Tel Aviv)Full-timePosted 3w ago

About the role

Be part of a team that designs and characterizes signal and power integrity for Google's IC designs, shaping the next generation of hardware experiences and hyperscale computing.

Responsibilities

  • Design and optimize power distribution networks (PDN) across chip, package, and board levels.
  • Conduct both pre-layout and post-layout power integrity simulations to analyze power and ground noise (SSN/SSO), voltage drops (IR drop), and EMI.
  • Implement and verify low-power design methodologies, such as multi-voltage designs and clock gating, using power intent formats like UPF/CPF.
  • Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
  • Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR), Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.

Qualifications

  • Bachelor's degree in Mechanical, Electrical Engineering, Material Science, or equivalent practical experience.
  • 5 years of experience in signal or power integrity or hardware design.

Skills

Required:Signal integrityPower integrity
Nice to have:EDA tools (Cadence Sigrity/Allegro, Ansys HFSS/PowerDC/Q3D, Keysight ADS, Synopsys HSPICE)Scripting (Python, Perl, Tcl)
Last updated Oct 23, 2026. Interested? Apply on the company site.

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