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CPU Design Verification Engineer, Core IP

Google· Core IP / Hardware
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BengaluruFull-timePosted 2w ago

About the role

Design Verification Engineer responsible for verifying next-generation RISC-V processor cores, building verification infrastructure, testbenches, and driving DV sign-off for high-performance CPU cores and related peripherals.

Responsibilities

  • Work with designers, architects and other stakeholders to come up with detailed test plans, dependencies and deliverables.
  • Plan the verification of RISC V CPU cores and related peripherals by fully understanding the design specification and interacting with architecture and design engineers to identify important verification scenarios.
  • Work closely with Architecture, software, design stakeholders to make technical decisions. Create and enhance constrained-random verification environments using System Verilog and UVM. Represent DV status throughout the development process.
  • Take technical decisions independently and ensure momentum for the project. Set the goal and own IP verification methodology. Identify methodology improvements.
  • Partner with Pre-Silicon (Si) and Post-Si Validation teams for successful bring up of the IP.

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 10 years of experience in verification of IPs, Subsystems and SoCs.
  • 8 years of experience in creating design verification strategies and plans, constraint random verification with SystemVerilog (SV) and Universal Verification Methodology (UVM).
  • 8 years of experience in verifying multi-stage, high-performance CPU core and related peripherals, RISC-V architecture and ISA extensions.

Skills

Required:SystemVerilogUVM (Universal Verification Methodology)RISC-V architecture and ISA extensions
Last updated Oct 23, 2026. Interested? Apply on the company site.

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