Staff ASIC Power Engineer, ML Accelerators
Sunnyvale, CA, USA$192k - $278kFull-timePosted 2w ago
About the role
In this role you’ll shape the future of AI/ML hardware acceleration, drive cutting-edge TPU technology, and contribute to power-efficient ASIC designs for Google's TPUs within AI/ML-driven systems.
Responsibilities
- Contribute to design power modeling and drive convergence to power targets.
- Investigate, spec, and deploy architectural and microarchitectural power optimization techniques.
- Define best practices and methodologies to achieve low-power RTL designs.
- Collaborate with cross-functional software and system teams to create novel power management architectures to meet dynamic power targets.
- Own the execution and delivery of complex technical projects end-to-end, while being the technical lead of an experienced power team.
Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent practical experience.
- 10 years of experience in design or architecture (e.g., logic design, power architecture, performance, or SoC design).
- Experience with power design, power modeling, power architecture, or power reduction methodologies/techniques.
Skills
Required:Power modelingDigital/ASIC design
Last updated Oct 23, 2026. Interested? Apply on the company site.
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