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SOC Quality and Reliability Engineer

Google
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Hybrid (Haifa and Tel Aviv)Full-timePosted 2w ago

About the role

Role focused on shaping AI/ML hardware acceleration through design-for-reliability and qualification of silicon and packaging for Google's TPUs and AI infrastructure.

Responsibilities

  • Drive the strategic definition and development of design-for-reliability (DfR) guidelines, collaborating with cross-functional subject matter experts to integrate reliability into early design stages.
  • Define and lead the development of qualification hardware and test methodologies, managing internal teams and external vendors to ensure silicon and package verification.
  • Execute comprehensive silicon and package qualification programs (including HTOL, ELFR, ESD/LU, b/HAST, etc.) and conduct failure analysis to resolve quality issues.
  • Extract and analyze data from qualification programs, high-volume manufacturing, and field returns to identify failure mechanisms and trends for yield and reliability optimization.
  • Develop and implement physics-based statistical Quality and Reliability models (e.g., ELF, TDDB, NBTI) to predict device failure mechanisms and lifetime behaviors.

Qualifications

  • Bachelor's degree in Electrical Engineering, Materials Science, Physics, or a related field or equivalent practical experience.
  • 8 years of experience in IC silicon quality or reliability.
  • Experience leading the product reliability lifecycle from post-tapeout through high-volume manufacturing.
  • Experience with semiconductor CMOS technology, device physics, and failure mechanisms.

Skills

Required:Design-for-reliability (DfR)Qualification methodologiesFailure analysis
Nice to have:Statistical data analysis
Last updated Oct 23, 2026. Interested? Apply on the company site.

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