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RTL Design Engineer, Silicon

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Mountain View, CA, USA$138k - $197kFull-timePosted 2w ago

About the role

Be part of a team that pushes boundaries, developing custom silicon solutions that power Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide, shaping the next generation of hardware experiences with performance, efficiency, and integration.

Responsibilities

  • Define microarchitecture for a subsystem.
  • Integrate internal or external IP.
  • Define microarchitecture of a small to medium size IP.
  • Perform RTL coding, function/performance simulation debug and Lint/CDC/FV/UPF checks.
  • Participate in test plan and coverage analysis of the sub-system and chip-level verification.

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • 4 years of experience with IP development or integration.
  • Experience in ASIC development with Verilog or VHDL.
  • Experience with a scripting language like Perl or Python.

Skills

Required:microarchitecture definitionRTL codingIP integrationVerilog or VHDLPython/Perl
Last updated Oct 23, 2026. Interested? Apply on the company site.

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