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Low Power ASIC Engineer - New College Grad 2027

NVIDIA· Engineer, ASIC
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Santa Clara, CA$100k - $166.8kfull-timePosted 1w ago

About the role

Low Power Design/Verification ASIC Engineer role at NVIDIA focused on developing energy-efficient GPU/SoC architectures, with emphasis on low power design techniques and verification methodologies for NVIDIA products.

Responsibilities

  • Working very closely with Low Power Architecture, Design, and Software teams to understand next generation features.
  • Responsible for architecting/developing testbench, infrastructure, and testplans to verify various power management solutions for NVIDIA products.
  • You will have the opportunity bring creative ideas that help improve power-aware DV methodologies, as well as influence EDA vendors to improve our simulation and debug efficiencies.

Qualifications

  • Recently completed a BS, MS or PhD in Electrical or Computer Engineering, or equivalent experience.
  • Understanding of low power design techniques such as multi VT, Clock gating, Power gating, Block Activity Power, and Dynamic Voltage-Frequency Scaling (DVFS).
  • Good understanding of processor architecture (GPU is a plus), and related power management design/DV techniques.
  • Experience with Incisive Low-Power or Synopsys VCS NLP
  • Strong debug skills and experience with Verdi
  • Fluent in Verilog, SystemVerilog, and understanding of UVM.

Skills

Required:VerilogSystemVerilogUVMVerdiDVFSPower managementLow power techniques
Nice to have:Python or PERLC/C++

Benefits

  • equity
  • benefits (see NVIDIA benefits page)
Last updated Oct 16, 2026. Interested? Apply on the company site.

About NVIDIA

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NVIDIA invents the GPU and drives advances in AI, HPC, gaming, creative design, autonomous vehicles, and robotics.

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