Senior Signal and Power Integrity Engineer - Hardware
NVIDIA· Engineer, ASIC Signal Integrity
Santa Clara, CA$136k - $218.5kfull-timePosted 1w ago
About the role
Senior Signal & Power Integrity Engineer focusing on system-level SI/PI for high-speed interfaces and PDN optimization across packages and PCBs, with hands-on modeling, lab measurements, and cross-functional collaboration.
Responsibilities
- Work on crafting creative Signal Integrity solutions to complex system design problems
- System-level signal integrity simulations of high-speed NVlinks 200Gbs+, USB-4, PCIe5, GDDR6, LP5X
- Modeling of vias, connectors, sockets and various system components in 3D EM tools
- Design and optimize Power Delivery Network (PDN) across packages and PCBs
- Constant improvements of SI/PI models through lab measurements
- Simulation automation, data gathering, analysis and visualization using JMP, MATLAB or similar tools
- Opportunity to work in dynamic cross-functional role to optimize package, PCB, ASIC, mixed signal circuit
Qualifications
- BS/MS-Electrical Engineering or equivalent experience
- 3+ years of industry experience
- SI/PI work on one or more signaling standards like PCI express, USB, SATA, HDMI, HBM, DDR5, GDDR6, LPDDR5X
- Hands on use of 3-D modeling tools like ANSYS HFSS/Q3D and 2.5-D with ANSYS SIWAVE or similar
- Experience with PDN evaluation using layout extraction tools for packages and PCBs and spice-based time domain simulations
- Background with a system level timing or loss budget including silicon, package and board impairments
- Familiarity with use of VNA, TDR, DSO, ParBERT and use of applications like JMP, Matlab will be a plus
Skills
Required:Signal Integrity (SI) and Power Integrity (PI) design3D electromagnetic modeling2.5-D modelingPDN evaluationCircuit simulationProgramming / data analysis
Nice to have:Lab measurements and correlation
Benefits
- equity
- benefits (see company benefits page)
Last updated Oct 16, 2026. Interested? Apply on the company site.
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