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Staff Hardware Engineer, TPU Interconnect and Packaging

Google
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Sunnyvale, CA, USA$192k - $278kFull-timePosted 1w ago

About the role

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You’ll contribute to the innovation behind products loved by millions worldwide, shaping the next generation of hardware experiences.

Responsibilities

  • Define the architectural strategy and package technology selection for next-generation TPU systems, incorporating 2.5D/3D interposers, embedded bridges, and co-packaged optics (CPO) modules.
  • Drive electro-optical co-design across silicon photonics dies, laser sources, package substrates, and drive electronics to maximize interconnect bandwidth density and energy efficiency.
  • Establish signal integrity, power delivery, thermal management, and mechanical design rules across multi-chiplet heterogeneous assemblies.
  • Partner with OSAT vendors, foundries, and optical component suppliers to co-develop custom substrate processes, sub-micron alignment flows, and optical coupling interfaces.
  • Lead full-lifecycle technology qualification from pathfinding and architectural simulation through to mass production readiness, while mentoring engineers, fostering technical excellence, and driving engineering best practices across the organization.

Qualifications

  • Bachelor’s degree in Electrical Engineering, Materials Science, Optical Engineering, Microelectronics, a related technical field, or equivalent practical experience.
  • 10 years of experience in semiconductor packaging, integration, or interconnect design.
  • Experience with interconnect modeling, 2.5D/3D interposer design rules, or chiplet package assembly.

Skills

Required:Electrical engineering fundamentalsInterconnect design and packaging

Benefits

  • Learn more about benefits at Google (link provided in description).
Last updated Oct 23, 2026. Interested? Apply on the company site.

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