Staff CPU Physical Design Engineer, Silicon gCPU
Hybrid (Mountain View, CA; Austin, TX)$192k - $278kFull-timePosted 1w ago
About the role
Lead end-to-end physical design strategy and execution for top-level and critical CPU blocks, driving novel methodologies and AI/ML optimization to maximize PPA.
Responsibilities
- Lead end-to-end physical design strategy and execution for top-level and critical CPU blocks across advanced process nodes.
- Pioneer novel Physical Design methodologies, tool flows, and AI/ML optimization techniques to maximize PPA (Power, Performance, Area).
- Resolve complex timing, power grid, EMIR, and physical verification bottlenecks in tight iteration loops.
- Drive technical roadmaps, mentor senior engineering peers, and influence architectural trade-offs across cross-functional teams.
Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent practical experience.
- 10 years of experience in Physical Design implementation, PPA optimization and design signoff convergence activities.
- Experience in high-performance, low-power physical design implementation or design convergence techniques with custom or industry standard synthesis, PnR and signoff tools.
Skills
Required:Physical DesignCPU block designEDA tools (synthesis, place-and-route, signoff)
Benefits
- Learn more about benefits at Google (link provided in job description)
Last updated Oct 23, 2026. Interested? Apply on the company site.
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