Physical Design and Implementation Engineer
Google· CPU implementation / silicon design
BengaluruFull-timePosted 1w ago
About the role
Be part of a team that pushes boundaries, developing custom silicon solutions powering Google's direct-to-consumer products. Own block or subsystem implementation with focus on optimizing power, performance and area, collaborating with RTL, DFT, and IP teams, and deploying AI workflows to improve PPA and time-to-market.
Responsibilities
- Develop all aspects of ASIC RTL2GDS implementation for the central processing unit (CPU) for the Tensor SOC.
- Signoff convergence including static timing analysis (STA), physical design verification (PDV), IR and Electo-Migration (EM).
- Manage block and subsystem level physical implementation and QoR (power, timing, area).
- Optimize power, performance and area (PPA) to achieve exceptional performance and cost.
- Reduce time to market and improve PPA through deployment of Artificial Intelligence (AI) physical design tools and workflows.
Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 4 years of experience in physical design.
Skills
Required:ASIC RTL2GDS flowStatic Timing Analysis (STA)Physical Design Verification (PDV)Power, Performance and Area optimization (PPA)
Nice to have:AI-driven physical design workflows
Last updated Oct 23, 2026. Interested? Apply on the company site.
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