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Senior Silicon Product Engineer – Manufacturing

NVIDIA· Engineer, ASIC
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Santa Clara, CA$168k - $264.5kFull-timePosted 4d ago

About the role

Senior Silicon Product Engineer – Manufacturing on the TMRQ team responsible for SLT production diagnostics, POR verification, and post-silicon validation for high-volume manufacturing of complex silicon (GPUs/SoCs/CPUs), with a focus on test coverage, yield, and quality improvements across multi-functional HW/SW teams.

Responsibilities

  • - Partner multi-functionally with HW engineering teams to determine test coverage and constraints for high-volume manufacturing screens.
  • - Partner with SW and platform teams to support SLT testing infrastructure, debug knobs, and data collection features.
  • - Co-design SLT testability scope and coverage enhancements for manufacturing testing with emphasis on high-volume system-level screens.
  • - Prototype and fine-tune speed, power, circuits, yield, and quality for silicon coverage in SLT socketed environment.
  • - Co-design, develop, and maintain SLT testing flows and correlate takeaways from silicon to design.
  • - Define procedures to facilitate Silicon correlation activities between production testing infrastructure and internal Si characterization/diagnostics programs.
  • - Support customer-facing and quality teams during escalations to fix gaps in SLT production coverage.
  • - Drive alignment for manufacturability, test time optimization, cost vs. coverage tradeoffs, and evaluate new tests.
  • - Initiate and drive process improvements and preventative actions via root cause analysis and data analytics.

Qualifications

  • Bachelor’s or Master’s Degree or equivalent in Microelectronics/Electrical/Electronic/Computer Engineering or equivalent experience.
  • 8+ years of relevant proven experience in silicon Post-silicon PVT validation and/or High-volume manufacturing testing for sophisticated SoCs, GPUs, CPUs, or similar.
  • Hands-on lab experience with silicon bring-up, lab debug, test content bring-up, and correlation to Si characterization, yield, and coverage optimization.
  • Strong EE fundamentals, device physics, knowledge of Silicon design, statistics, STA concepts, signal integrity, fault analysis, sampling, and computer architecture.
  • Excellent interpersonal skills and demonstrated ability to drive multi-functional alignment around plans, dependencies, and sign-off criteria.
  • Prior ownership of manufacturing test strategy for a major silicon product from early planning through ramp to QS/production.
  • Strong data analysis skills. Prior experience working with volume data is a plus.
  • Good understanding of firmware/driver structures and their interaction with HW.
  • Problem-solving, debugging, analysis, and logical reasoning skills with examples.
  • Experience with Python, BASH, Linux, and scripting.

Skills

Required:Post-silicon PVT validationSLT testinglab bring-up and debuggingdata analysisPythonBASHLinux

Benefits

  • equity
  • benefits (as listed in postings)
Last updated Oct 23, 2026. Interested? Apply on the company site.

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