Staff Board Design Engineer
Google· Silicon Systems and Engineering
Haifa, Tel AvivFull-timePosted 3d ago
About the role
Lead technical authority for architecture, schematic design, and complex layout of mission-critical PCB platforms powering Google's custom silicon (e.g., TPUs). Responsible for end-to-end hardware development of Reference Validation Platforms, silicon characterization boards, and high-density test fixtures, including high-current power delivery and ultra-high-layer-count interconnect.
Responsibilities
- Define system specifications, block diagrams, power trees, clock distribution topologies, and component selection for server-class silicon validation platforms and characterization fixtures.
- Drive schematic capture and guided physical layout for high-density interconnect, ultra-high-layer-count (24+ layers) PCBs using Cadence Allegro, Concept, and OrCAD.
- Partner with Signal Integrity and Power Integrity teams to implement decoupling strategies, multi-phase voltage regulator module designs delivering high-current rails (>500A to 1000+A), and impedance-controlled high-speed routing.
- Direct post-silicon board bring-up in the lab using high-speed oscilloscopes, logic analyzers, and thermal imaging; mentor team members and establish hardware design guidelines.
- Enforce Design for Manufacturing, Design for Assembly, and Design for Test guidelines; collaborate with PCB fabricators and EMS to resolve issues and optimize yield.
Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, or equivalent practical experience
- 10 years of experience in high-speed, multi-layer board-level hardware design
- 5 years of experience managing teams
- Experience designing and routing high-speed digital interfaces (PCIe Gen6, DDR5/LPDDR6, USB4, I3C, SPI, high-speed SerDes) and clock distribution networks
- Experience in schematic capture and PCB layout tools (Cadence Allegro Design Authoring/Concept HDL and Allegro PCB Editor)
- Experience designing multi-phase PoL voltage regulators, high-efficiency DC-DC converters, power sequencing, and high-transient power delivery systems
Skills
Required:System-level specificationsSchematic capture and PCB layoutHigh-speed interconnect designPower delivery design
Benefits
- Google equity/stock grants (discretionary)
- Equal opportunity employer policies and accommodations as needed
- English proficiency required unless stated otherwise in posting
Last updated Oct 23, 2026. Interested? Apply on the company site.
More open roles at Google
- Staff Network Security Engineer, Google Enterprise Network3d agoHybrid (Austin, TX; Sunnyvale, CA)
- Group Product Manager, Google Lens AI Shopping3d agoMountain View, CA, USA · Product Management
- UX Program Manager3d agoHybrid (New York, NY; San Bruno, CA) · UX Programs & Operations
- Senior Staff Software Engineer, Android Automotive OS3d agoHybrid (Kraków, Poland; Munich, Germany)
- 3d ago