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Silicon Micro-Architecture and RTL Lead, Google Cloud

Google· Google Cloud
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BengaluruFull-timePosted 3d ago

About the role

Lead role focusing on silicon design, microarchitecture, and RTL for TPU-related AI/ML hardware acceleration, with responsibilities spanning IP/subsystem development, verification, and collaboration with architecture, FW, and SW teams.

Responsibilities

  • Drive development of Complex IPs and Subsystems along with a team of engineers in the Bangalore design organization.
  • Own microarchitecture and implementation of IPs and subsystems.
  • Work with Architecture, Firmware (FW) and Software (SW) teams to drive feature closure and develop microarchitecture specifications.
  • Drive design methodology, libraries, debug, code review in coordination with other IPs Design Verification (DV) teams and physical design teams.
  • Identify and drive Power, Performance and Area improvements for the domains owned.

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 10 years of experience in Application-Specific Integrated Circuit/System on a chip (ASIC/SoC) development with Verilog/SystemVerilog.
  • Experience in micro-architecture and design of IPs and Subsystems.
  • Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).

Skills

Required:Verilog/SystemVerilogIP/Subsystem designASIC design verification
Nice to have:Programming languages
Last updated Oct 23, 2026. Interested? Apply on the company site.

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