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SoC Power Lead, Memory Subsystem

Google· Hardware / SoC Engineering
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Mountain View, CA, USA; San Diego, CA, USA$192k - $278kFull-timePosted 3d ago

About the role

Be part of a team that builds custom silicon solutions powering Google's direct-to-consumer products, focusing on power management and optimization for memory subsystems within mobile SoCs.

Responsibilities

  • Lead the definition of power requirements for Tensor mobile System-on-Chips (SoCs) to achieve Power-Performance-Area (PPA) with a primary focus on the memory subsystem (memory controller, DDRPHY, DRAM).
  • Own and drive cross-functional teams to deliver on power Key Performance Indicators (KPIs) for the memory subsystem and other major SoC IPs.
  • Propose and drive power optimizations for the memory subsystem throughout the design process from concept to mass productization.
  • Drive power-performance trade-off analysis for engineering reviews and product roadmap decisions.
  • Represent status of SoC power to the executive leadership team.

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • 10 years of experience with memory subsystem architectures, including for mobile SoCs.
  • Experience in power management or low power design/methodology, as well as with low power architecture and power optimization techniques.
  • Experience with full product delivery cycle (e.g., definition, architecture, design and implementation, testing, productization).

Skills

Required:Memory subsystem architecturesPower management / low power designTensor mobile SoCsCross-functional leadershipPower-performance trade-off analysis

Benefits

  • Learn more about benefits at Google (link provided in job description).
Last updated Oct 23, 2026. Interested? Apply on the company site.

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