Design Verification Engineer, Google Cloud TPU
Sunnyvale, CA, USA$138k - $197kFull-timePosted 3d ago
About the role
ASIC Design Verification Engineer focused on verifying TPU (Tensor Processing Unit) architecture and its integration within AI/ML-driven systems. Role involves shaping AI/ML hardware acceleration, developing custom silicon solutions, and performing direct verification in active projects.
Responsibilities
- Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
- Identify and write all types of coverage measures for stimulus and corner cases.
- Debug tests with design engineers to deliver functionally correct design blocks.
- Close coverage measures to identify verification holes and to show progress towards tape-out.
- Create a constrained-random verification environment using SystemVerilog and UVM.
Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent practical experience.
- 4 years of experience with design verification.
- Experience with SystemVerilog/Verilog.
Skills
Required:SystemVerilog/VerilogConstrained-random verification
Last updated Oct 23, 2026. Interested? Apply on the company site.
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