Sr. Hardware Engineer - ML Acceleration
Amazon· Hardware Development
Hybrid (Austin, TX), Hybrid (Cupertino, CA)$185.2k - $250kFull-timePosted yesterday
About the role
Hardware Design Engineer focused on definition, design, and validation of AWS next generation ML chips, cards, and server integration within Annapurna Labs. Leadership in PCIe/SerDes interfaces and cross-boundary collaboration to deliver optimized, scalable ML acceleration hardware for AWS datacenters.
Responsibilities
- Definition, design and validation of AWS next generation ML Chips, Cards and server integration.
- Lead in PCIe and SerDes topics at chip and PCB levels.
- Design and optimization of hardware in data centers as part of the Machine Learning Acceleration team.
- Provide leadership in applying new technologies to large scale server deployments.
- Improve product performance, quality, and cost; drive tasks from start to completion.
- Collaborate cross-functionally with SD (SW) teams to define and implement diagnostics for hardware validation at component, interface, and system level.
Qualifications
- Bachelor's degree in Electrical Engineering or a related field
- Deep knowledge with PCIe interface Gen4 or above, electrical and functional at chip and PCB level
- Deep understanding of Transmission line theory and Electromagnetics and its application in SerDes, single-ended signals, and parallel bus interfaces
- Hands-on lab equipment skills (VNA, realtime/sampling scope) for electrical validation and characterization
- Scripting skills to automate tests, logs parsing and data collection
- Strong technical communication skills (verbal and written) to interface with cross-functional technical leads
- Experience with Server HW designs, Design validation, Production tests and signal integrity of high speed interfaces
- Knowledge of product development cycle from concept to mass production
- Ability to work independently and drive tasks to completion
- Ability to work cross functionally with SW team to define and implement diagnostics for hardware validation at component, interface, and system level
- Experience with server (x86 / ARM) design or architecture
Skills
Required:PCIe Gen4+ interface designSerDes and high-speed signalingLab validation and characterizationScripting for test automationCross-functional collaboration
Benefits
- Health insurance (medical, dental, vision, prescription) and Basic Life & AD&D insurance with option for Supplemental life plans
- 401(k) matching
- Paid time off
- Parental leave
- RSUs and sign-on payments as part of compensation
Last updated Oct 25, 2026. Interested? Apply on the company site.
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