Verification Engineer Intern
Snap Inc.· Wearables Compute Group
Eindhovenfull-time internshipPosted 6mo ago
About the role
13-week internship in Eindhoven focusing on verification of Snap’s custom-developed SoC for Spectacles, with opportunities to apply state-of-the-art verification practices and collaborate with an international team.
Responsibilities
- Verify our custom-developed System on Chip (SoC) to ensure the highest product quality
- Work on challenging technical projects that align with business and product needs
- Research and implement state of the art verification practices (e.g. AI driven tests, regression automation, KPI exploration)
- Partner closely with mentor and teammates on internship project
- Learn and apply new verification engineering skills
Qualifications
- Currently enrolled in a BS/MS program in computer science / electrical engineering or a technical field
- Graduating no earlier than December 2026
- Must be able to start in office in Q2 of 2026 for a 13-week internship
- Background in verification methodologies and processes (preferred) such as UVM / SystemVerilog
- Relevant SoC and scripting languages such as C, Python (preferred)
- Experience with AI-assisted coding tools (preferred)
- Ability to read RTL code (SystemVerilog, Verilog, VHDL) (preferred)
- Familiarity with EDA vendor tools (Synopsys, Cadence, Mentor) (preferred)
- Strong problem solving and collaboration skills
- Ability to work with an international, cross-functional team
Skills
Required:Problem solving and collaboration
Nice to have:SystemVerilog / RTL readingVerification methodologies (UVM)Programming/scriptingAI-assisted coding tools
Benefits
- Paid parental leave
- Comprehensive medical coverage
- Emotional and mental health support programs
- Compensation packages that share in Snap’s long-term success
- Benefits designed around employee needs
Last updated Oct 21, 2026. Interested? Apply on the company site.
About Snap Inc.
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