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Integrated Circuit Design Verification Engineer

Snap Inc.· Spectacles Team / Snap Inc
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Vancouver$173k - $259k + equityFull timePosted 3mo ago

About the role

Integrated Circuit Design Verification Engineer position on the Spectacles Team at Snap Inc, focused on designing display ICs for AR and verifying them using UVM-based methodologies.

Responsibilities

  • Work as part of a multi-disciplinary team designing display Integrated Circuits for AR
  • Work closely with digital design, analog logic, software and verification engineers
  • Develop and implement UVM-based and assertion-based testbenches
  • Create and execute verification test plans, including functional coverage and code coverage
  • Utilize Siemens Questa tool set for verification and debug tasks
  • Specify and configure tools and create automation

Qualifications

  • BSEE or MSEE or relevant years of experience
  • 10+ years of experience in ASIC Design Verification

Skills

Required:UVMSystemVerilogVerilog RTL codingScripting languages

Benefits

  • Paid parental leave
  • Comprehensive medical coverage
  • Emotional and mental health support programs
  • Compensation packages that let you share in Snap’s long-term success
Last updated Oct 21, 2026. Interested? Apply on the company site.

About Snap Inc.

We contribute to human progress by empowering people to express themselves, live in the moment, learn about the world, and have fun together.

We believe the camera presents the greatest opportunity to improve the way people live and communicate.

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