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Hardware Engineer (FPGA/ASIC) Internship, May-August

Jane Street· Technology
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New YorkinternshipPosted 3mo ago

About the role

Internship focused on hardware engineering using the Hardcaml OCaml stack to design, test, and validate FPGA/ASIC hardware. Mentored by full-time engineers, with project work spanning RTL design, testing, and integration.

Responsibilities

  • Build hardware applications from concept to a working design, predominantly involving OCaml & Hardcaml for RTL design and testing/integration.

Qualifications

  • Comfortable with a software programming language
  • Experienced with a Hardware Description (or Construction) language (VHDL, Verilog, Chisel, Pymtl, or other) for both writing and testing hardware designs
  • Experienced working with FPGA or ASIC vendor tools - Vivado or Quartus for FPGAs, Genus or Innovus for ASICs
  • Experienced with building a working hardware project (either FPGA or ASIC) through an academic, professional, or personal project
  • Interested in learning how to use FPGAs or ASICs in the context of networking

Skills

Required:Hardware Description LanguageFPGA/ASIC toolsOCaml & Hardcaml
Last updated Oct 25, 2026. Interested? Apply on the company site.

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Jane Street is a quantitative trading firm and liquidity provider with a unique focus on technology and collaborative problem solving.

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