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Senior AI Performance Architect

Microsoft· Hardware Engineering
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Mountain View, CA, Boston, MA, Redmond, WA$119.8k - $234.7kfull-timePosted 2w ago

About the role

Senior AI Performance Architect within the SPARC team of Microsoft’s Azure Hardware Systems and Infrastructure (AHSI), focused on analyzing frontier AI workloads, building performance models and tools, and guiding hardware–software co-design for cloud-scale AI systems.

Responsibilities

  • Analyze frontier training and inference workloads to identify key performance requirements and bottlenecks.
  • Develop and improve analytical models, simulators, and data-analysis tools for AI system performance.
  • Evaluate trade-offs in performance, scalability, utilization, capacity, and cost across accelerator, memory, network, and software configurations.
  • Study hardware-software interactions in large-scale AI systems and translate workload insights into architecture requirements.
  • Work with MSI and partner teams to evaluate hardware-software co-design options for training and inference.
  • Develop and run targeted microbenchmarks on silicon to measure compute, memory, communication, kernel, and synchronization performance.
  • Compare analytical model predictions with silicon and end-to-end workload measurements, identify gaps, and improve model accuracy.
  • Communicate findings and recommendations through clear data visualizations, technical reports, and architecture decision materials.

Qualifications

  • Master's Degree in Computer Science, Electrical Engineering, Computer Engineering, Applied Mathematics, or a related field AND 3+ years of technical engineering experience; OR Bachelor's Degree in a related field AND 5+ years of technical engineering experience; OR equivalent experience.

Skills

Required:Analytical performance modelingPythonSystems/accelerator programming (e.g., C++, CUDA, Triton, ROCm/HIP)Experience with AI training/inference workloads
Nice to have:Transformer-based models / LLMs / related techniquesDistributed execution strategiesAccelerator architecture and memory hierarchies
Last updated Oct 9, 2026. Interested? Apply on the company site.

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