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Silicon Debug Engineer

Microsoft· Silicon Engineering
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Pulau Pinang, Gelugorfull-timePosted 1w ago

About the role

Silicon Debug Engineer role within the SMPE team of SCHIE, focused on driving silicon failure analysis, fault isolation, and product debugging across Cobalt and Maia programmes to improve product quality and debug efficiency in Microsoft’s cloud silicon initiatives.

Responsibilities

  • Lead FA/FI investigations covering first-silicon bring-up, manufacturing, reliability qualification, system integration and customer RMA failures.
  • Reproduce and characterize failures on ATE and system-level test environments using production and debug test programme, shmoo analysis, margin data and failure-signature correlation.
  • Isolate failures across memory, logic, interconnect, I/O, clock, reset, power and security subsystems using DFT diagnostics and electrical evidence.
  • Perform electrical failure analysis and fault localization using optical and laser-based techniques such as EMMI, LVI and LADA, where available.
  • Debug test hardware, load boards, sockets, test programme and test content; develop practical workarounds and corrective actions when the test solution contributes to a failure.
  • Analyze manufacturing and RMA data to identify silicon, package, test-coverage, setup or process issues and convert findings into actionable hypotheses.
  • Correlate ATE results with laboratory, OSAT, supplier and customer-platform behavior to validate silicon design, process, package and manufacturability against product specifications.
  • Define FA plans, select internal or third-party laboratory capabilities, prepare PFA requests and integrate EFA/PFA results into the final root-cause conclusion.
  • Drive cross-functional debug reviews, communicate technical evidence clearly and maintain traceable investigation records, decisions, risks and actions.
  • Develop and improve debug content, automation and data-analysis methods using Python and/or Java-based test environments.
  • Contribute to test-hole closure, screening improvements, escape prevention and lessons learned that scale across future custom-silicon programme.
  • Apply knowledge of platform, package, silicon power management and thermal behavior to resolve product-quality issues.
  • Support system-level test correlation and debug.

Qualifications

  • Bachelor’s Degree in Electrical Engineering, Computer Engineering, Physics, Materials Science or a related technical field AND 3+ years of semiconductor product, test, failure-analysis or silicon-debug experience, OR equivalent experience.
  • 3+ years of hands-on experience in integrated-circuit failure analysis, fault isolation, silicon debug, ATE test engineering or test-programme/content development.
  • Experience debugging complex SoCs across at least two areas, such as boot, JTAG, clocks/resets, memory/MBIST, scan, high-speed I/O, power management, security or fuses.
  • Experience interpreting electrical test data and working across engineering teams to drive root-cause investigations to closure.
  • Experience debugging complex SoCs across at least two of the following: boot, JTAG, clocks/resets, memory/MBIST, scan, high-speed I/O, power management, security or fuse-related functions.
  • Experience interpreting electrical test data and partnering across design, DFT, product, package, manufacturing, platform or supplier teams to drive root-cause closure.

Skills

Required:FA/FI investigationsElectrical failure analysisCross-functional collaboration
Nice to have:DFT/DFM conceptsPython/Java for automation
Last updated Oct 16, 2026. Interested? Apply on the company site.

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